CMOS Operational Amplifier Design and SPICE Simulation (22nm)¶
- Task ID:
electrical_engineering.cmos_opamp_design - Domain:
electrical_engineering - Subdomain:
analog_ic_design - Status:
test - Tags:
analog_design,opamp,cmos,spice,ngspice,circuit_simulation
Public Summary¶
This page is generated from task metadata and selected public-safe excerpts.
Example B1 Prompt Excerpt¶
# B1: CMOS Operational Amplifier Design — Complete Algorithm Description
## Task Overview
Design and simulate a **CMOS operational amplifier** in **22nm technology** using **ngspice**. You are given performance specifications, a MOSFET model library, and explicit textual measurement definitions. You must produce a working op-amp circuit represented by SPICE netlist, run SPICE simulations, and verify that the design meets all specifications.
## Background
### CMOS Op-Amp Design
Operational amplifiers are fundamental analog building blocks. In this benchmark, the evaluator benches use a fixed five-pin op-amp interface and the most natural design choice is a differential-input, single-ended-output topology, which balances gain, bandwidth, stability, output swing, and power.
For this task, a **two-stage Miller-compensated op-amp** is the most natural reference topology:
- a differential first stage for input gain
Notes¶
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- Higher-level prompt details and internal benchmark specifics may remain intentionally undisclosed.